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| ! "# $$ "# $ $ " % $ "& $ $ " pd-94593 11/21/03 ip1202 www.irf.com 1 ? 5.5v to 13.2v input voltage 0.8v to 5v output voltage 2 phase synchronous buck power block 180 out of phase operation single or dual output capability dual 15a maximum load capability single 2 phase 30a maximum load capability 200-400khz per channel nominal switching frequency over current hiccup or over current latch external synchronization capable overvoltage protection individual soft start per outputs over temperature protection internal features minimize layout sensitivity * very small outline 15.5mm x 9.25mm x 2.6mm ip1202 power block features dual output full function 2 phase synchronous buck power block integrated power semiconductors, pwm control & passives ! " # $ %&!"" ' # ! # " ( ") " *%$+ # # ' # " *%$+ " *%$+ ! description ip1202 configurations v in v out v in v out channel 1 channel 2 v out channel 1 channel 2 v in v out channel 1 channel 2 v out channel 1 channel 2 v in v out www.irf.com 2 ip1202 absolute maximum ratings recommended operating conditions electrical specifications @ v in = 12v all specifications @ 25c (unless otherwise specified) parameter symbol min typ max units conditions v in v in -0.3 - 15 feedback vfb1/vfb2 -0.3 - 6 output overvoltage sense vfb1 s /vfb2 s -0.3 - 6 pgood -0.3 - 15 enable -0.3 - 15 soft start ss1/ss2 -0.3 - 6 vp-ref -0.3 - 6 hiccup hiccup -0.3 - 15 sync -0.3 - 6 output rms current per channel iout vsw --15a 2 independent outputs. see fig. 3 block temperature t blk -40 - 125 c capable of start up over full temperature range. see note 1. v parameter symbol min typ max units conditions input voltage range v in 5.5 - 13.2 --15a 2 independent outputs t pcb = t case = 90c. see fig. 3 --11a 2 independent outputs t pcb = 90c, t case = no airflow, no heatsink. see fi g . 3 0.8 - 5.0 for v in = 12v 0.8 - 3.3 for v in = 5.5v output voltage range v out v output rms current per channel iout vsw parameter symbol min typ max units conditions over current shutdown i oc -25-a v in = 12v, v out = 1.5v f sw = 300khz, r ocset = 51.1k ? hiccup pin pulled low hiccup duty cycle d hiccup -5-% hiccup pin pulled high, output short circuited. soft start time t ss 5 ms v in = 12v, v out = 1.5v, c ss1 = c ss2 =0.1f reference voltage v ref -0.8- v v out_acc1 -3 - 3 t blk = -40c to 125c, see note 1. v in = 12v, v out = 1.5v v out_acc2 -2.5 - 2.5 t blk = 0c to 125c, see note 1. v in = 12v, v out = 1.5v error amplifier 2 input offset voltage v os2 -4 - 4 mv v in = 12v, v out = 1.5v, specified for current share accuracy in parallel configuration. r shunt1 = r shunt2 =5m ? , iout= 30a. see fig. 15 fb1/fb2 input bias current i bfb --0.1- a error amplifier source/sink current i err -60- a error amplifier transconductance g m1, g m2 - 2000 - mho output overvoltage shutdown threshold ovp - 1.15 x v ou t -v see ovp note in design guidelines ovp fault propagation delay t ovp -25- s output forced to 1.125vref pgood trip threshold v th_pgood - 0 .85 x v out v fb1 or fb2 ramping down pgood output low voltage v lo_pgood -0.25- v i sink =2ma f sw = 300khz, v in = 12v, t blk = 25c v out1 = v out2 = 1.5v, i out1 = i out2 = 15a - 7.0 8.75 % v out accuracy w p loss power loss www.irf.com 3 ip1202 electrical specifications (continued) ,-. / 012 01 3 ' ! parameter symbol min typ max units conditions 170 - 230 khz r t = 48.7k ? ( see fig.9 for frequency f sw 255 - 345 khz r t = 30.9k ? r t selection ) 340 - 460 khz r t = 21.5k ? sync frequency range f sync 480 - 800 khz free running frequency set 20% below sync frequency sync pulse duration t sync -200-ns sync, hiccup high level threshold voltage 2--v sync, hiccup low level threshold voltage --0.8v v in quiescent current i in-leakage -15-ma v in = 12v, enable high thermal shutdown temp shdn -140-c max duty cycle d max 85 - - % f sw = 200khz, t blk = 25c enable threshold voltage v en-lo 5--v measured between v in and enable output disable voltage soft start low threshold voltage v ss-dis - - 0.25 v ss1 / ss2 pins pulled low www.irf.com 4 ip1202 ip1202 internal block diagram hiccu p control oc latch / pgood ovp (-10%) (+15%) bias generato r ss1 ss2 ocset1 ocset2 hiccup fb1 cc1 sync rt vref vp-ref fb2 cc2 fb1s fb2s 25ua 25ua 25k 25k 25k 25k er ror amp1 er ror amp2 0.8v two phase os ci ll ato r pwm comp1 pwm comp2 r s q r s q ramp1 ramp2 sw1 / sw3 off sw2 / sw4 on en ab le pgood vsw1 sw2 sw1 sw4 sw3 0.8v vcc vsw2 20k uvlo 20k 3ua 3ua vin dr iver 1 dr iver 2 pwm1 pwm2 pgnd 64ua 64ua www.irf.com 5 ip1202 "4 # 1 3 * 53* 6# 7 0 10 2030405060708090100 120 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 0 10 2030405060708090100110120 pcb tem perature (oc) output current per channel (a) case temperature ( t x v in = 12v v out 1 = v out 2 = 1.5v i out = 15a f sw = 300khz l = 1.0 h safe operating area 0 1 2 3 4 5 6 7 8 9 10 11 12 0123456789101112131415 output current per channel (a) total power loss, both outputs (w) v in = 12v v out 1 = v out 2 = 1.5v f sw = 300khz l = 1.0 h t blk = 125c maximum typical www.irf.com 6 ip1202 , "4 # 8 , "4 # ( , "4 # ( , "4 # $ 0.955 0.970 0.985 1. 0 0 0 1. 0 15 1. 0 3 0 1. 0 4 5 1. 0 6 0 1. 0 7 5 1. 0 9 0 1. 10 5 1. 12 0 0.5 11.522.533.544.55 output voltage (v) normalized power loss -1.5 -1.0 -0.5 0.0 0.5 1. 0 1. 5 2.0 2.5 3.0 3.5 4.0 soa temp adjustment (c) v in = 12 v i ou t 1 = i ou t 2 = 15 a f sw = 300khz l = 1.0 h t blk = 12 5 c 0.910 0.925 0.940 0.955 0.970 0.985 1. 0 0 0 1. 0 15 1. 0 3 0 1. 0 4 5 1. 0 6 0 200 250 300 350 400 sw itching frequency (khz) normalized power loss -3.0 -2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1. 0 1. 5 2.0 soa temp adjustment (c) v in = 12 v v ou t 1 = v ou t 2 = 1. 5 v i ou t 1 = i ou t 2 = 15 a l = 1.0 h t blk = 125c 0.97 1. 0 0 1. 0 3 1. 0 6 1. 0 9 1. 12 1. 15 1. 18 1. 2 1 1. 2 4 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 output inductance ( h) normalized power loss -1.0 0.0 1. 0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 soa temp adjustment ( c) v in = 12 v v ou t 1 = v ou t 2 = 1. 5 v i ou t 1 = i ou t 2 = 15 a f sw = 300khz t blk = 12 5 c , *# 3 9) + 3 ( /( 4 8 12 16 20 24 28 32 36 40 44 48 52 56 4 6 8 10 12 14 16 18 20 22 24 overload current (a) r oc-set (k : ) v in = 12v v out1 = v out2 = 1.5v f sw = 300khz l = 1 p h t blk = 125c 0.925 0.940 0.955 0.970 0.985 1.000 1. 0 15 1.030 1.045 1.060 5 6 7 8 9 10 11 12 13 14 input voltage (v) normalized power loss -2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 soa temp adjustment ( 0 c) v ou t 1 = v ou t 2 = 1. 5 v i ou t 1 = i ou t 2 = 15 a f sw = 300khz l = 1.0 h t blk = 125c 200 220 240 260 280 300 320 340 360 380 400 20 25 30 35 40 45 50 r t in kohms switching frequency in khz per channel switching frequency vs r t www.irf.com 7 ip1202 !"# $ % & '() '*+ , ( -./0. ( -)1 !"# ( 2 3 , 4 & ( ,'( * ) * . 5)+ % 6 576 % 5)#! 8 * 6 5)6 ' &5 ,118 * * . 5)1+ % 6 576 % 5)#! 8 * 6 5,,6 ' &5 ,118 * ) 23 9( / 47!:5 )!4 2 3 ; 1<, 2!3 ; 1<7 2"3 ; & )1 2#3 ; 1<7 + -= 5 )!(1<,(1<7()1(1<7 ,#4 '*+ ( % )3 > . ( -./ ( 3 > ( '*+ 2 +;?)1 # ( 3 ,3 > '*+ @( ?( '*+ 3 % )! . 0 102030405060708090100 120 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 0 102030405060708090100110120 pcb temperature (oc) output current (a) case temperature ( t x v in = 12v v out 1 = v out 2 = 1.5v i out = 15a f sw = 300khz l = 1.8uh safe operating area 1 3 2 www.irf.com 8 ip1202 * 23 9( / " 4:5,4 2 3 ; 1<, 2!3 ; )1#! 2"3 ; & )1 2#3 ; 1<7 + -= 5,4(1<,()1#!()1(1<7 ,),4 5,#4a,),4 "74 ! + 5))1.0 5<1. * ) 2 3 ; '*+ ?,. 2!3 ; '*+ ?1". 2"3 ; '*+ & 1. 2#3 ; '*+ ? 1#. ( 5?,.?1".a)<.?1#. ?,". ( '*+ ?,". ) * 2 3 ; '*+ ?,. 2!3 ; '*+ ,<. 2"3 ; '*+ & 1. 2#3 ; '*+ ? 1#. ( 5?,.a,<.?1.?1#. 1<. ( '*+ 1<. " 0 102030405060708090100 120 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 0 102030405060708090100110120 pcb temperature (oc) output current (a) case temperature ( t x v in = 12v v out 1 = v out 2 = 1.5v i out = 15a f sw = 300khz l = 1.8uh safe operating area unad j usted soa current ad j usted soa current 0 102030405060708090100 120 110 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 0 102030405060708090100110120 pcb tem perature (oc) output current (a) case temperature ( t x v in = 12v v out 1 = v out 2 = 1.5v i out = 15a f sw = 300khz l = 1.8uh safe operating area unadjusted soa current adjusted soa current www.irf.com 9 ip1202 table 1: pin description pin name ball designator pin description v in a1 a2 a3 a4 a15 a16 a17 a18 b1 b2 b3 b4 b15 b16 b17 b18 c1 c2 c3 c4 c15 c16 c17 c18 input voltage connection pins cc1 h6 out p ut of the first error am p lifier cc2 h13 out p ut of the second error am p lifier enable a8 b8 sin g le pin for both outputs. commands ouputs on or off. normally pulled hi g h. pulled low, turns both out p uts on. ss1 h8 soft start pin for output 1. external capacitor provides soft start. pullin g soft start p in low will disable this out p ut. ss2 h11 soft start pin for output 2. external capacitor provides soft start. pulling soft start pin low will disable this output. fb1 j6 invertin g in p ut of error am p lifier 1 fb1s j8 output 1 overvoltage sense pin. fb2 j13 invertin g in p ut of error am p lifier 2 fb2s j11 output 2 overvoltage sense pin. vsw1 d1 d2 d3 e1 e2 f1 f2 g1 g2 h1 h2 j1 j2 k1 k2 l1 l2 output 1 inductor connection pins vsw2 d16 d17 d18 e17 e18 f17 f18 g17 g18 h17 h18 j17 j18 k17 k18 l17 l18 output 2 inductor connection pins pgnd a5 a6 a7 a9 a10 a12 a13 a14 b5 b6 b7 b10 b11 b12 b13 b14 c5 c6 c7 c8 c9 c10 c11 c12 c13 c14 d5 d6 d7 d8 d9 d10 d11 d12 d13 d14 e3 e4 e5 e6 e13 e14 e15 e16 f3 f4 f5 f6 f8 f9 f10 f11 f13 f14 f15 f16 g3 g4 g6 g9 g10 g13 g15 g16 h4 h9 h10 h15 j4 j5 j9 j10 j14 j15 k4 k5 k14 k15 l3 l4 l5 l13 l14 l15 l16 power ground pins vref l9 amplifier 1 reference voltage. connect a 100pf cap from this pin to pgnd. vp-ref l8 amplifier 2 reference voltage. connect to vref for independent output confi g uration. refer to application notes on how to connect to parallel configuration or output voltage tracking configurations. sync k6 external clock synchronization pin. set free running frequency to 80% of the sync frequency. when not in use, leave pin floating r t l11 switching frequency setting pin. for r t selection, refer to fi g .9 of the datasheet. pgood l10 power good pin. open collector, requires external pulll-up. if function not needed, p in can be left floatin g hiccup l6 lo g ic level pin. pulled hi g h enables hiccup mode of operation. pulled low enables latched overcurrent shutdown mode. ocset1 g8 overcurrent trip threshold pin for output 1 ocset2 g11 overcurrent trip threshold pin for output 2 www.irf.com 10 ip1202 pgnd vin vsw1 fb2 fb1 vsw2 ip1202 lo1 lo2 co1 co2 cin a iout1 average v vout1 average v vout2 average vin dc v vin average a iin average iout1 iout2 a iout2 average averaging circuit 2 averaging circuit 1 vout1 vout2 fig. 10: power loss test circuit p in = v in average x i in average p out = (v out1 average x i out1 average) + + (v out2 average x i out2 average) p loss = p in - p out www.irf.com 11 ip1202 fig. 11: recommended pcb footprint (top view) all dimensions in inches (millimeters) #$ % & #'$ #'$ % % % & () () () () *+ , ! - % % . /' ! ') www.irf.com 12 ip1202 " " !%& # $ " ! !" " " ) # ' " ' 5:. 6 # ( ( : " # 9, :49 " 9, :49 9, :49"" # " ' .,; # &*389 " 5 8 6 ' $ ' " ' " ## # ! 9, :49" 1 " ! 3 3 # # ! ' # "' # ' ' 9 <=' > ) 1 ( ; "' ! # ' # 1 ?( ! "8 " # ! #" ' " $ !" %& ' 9 # " %& ) # " " $ !(' ( ( ?( ' + ' 8 # ' " " ' ' ' 1 & ? ' 1 8 ' ! $+ , ,' ' " fig. 13: power up threshold 3v 0.8vtyp v css v out css iss ip1202 ss1/ss2 fig. 12: soft start/enable circuit www.irf.com 13 ip1202 %& # ? 0 %& # &#! ? 0 8 3 " 5 6 @a @ ) + 38 2 # ) ' 3 " " ' ' ; !+ > " ) ' ? @ , ' # 3 #' % ! 3b,1 $!%!!&! % '( ! ! *# " - @$11c *# 3 " $ @ 5@ 6! " $ @ " 5@ ' 6! # " " ; # ! @$11c ! " $ @$11c ! " # ! " " " " ! > " ' # # # # # " = @$11c > # " @$11c ) + + *139 *139 (3% (3% # + 8 ? + + $!$ &! % )&* *## #' 8: 8: *( # *( > # c ## ! *( " ' $ ! 89 " 89 ! " + 9, :49 *## 8: 8: # # " ! 8: 8: 8 $$$ ! 8: 8: # # + ; " *( $ ! # $ !(' ( ! 8 ' # ) " " 8 d! " ;1 $ + 1 + )1 /4=+ 3+ /e # 1 + ;1 4 " 8 ! "' " 8 a!8 !8 d & ! www.irf.com 14 ip1202 ip1202 dual output simplified schematic vin ss1 vp-ref pgnd fb1s fb1 vsw1 hi ccu p cc 1 pgood ss2 vref rt sync vsw2 fb2 fb2s cc 2 oc2 enable oc1 ip1202 vin ss1 vp-ref pgnd fb1s fb1 vsw1 hi ccu p cc 1 pgood ss2 vref rt sync vsw2 fb2 fb2s cc 2 oc2 enable oc1 c8 0.1uf l1 1.0uh cout1 470uf r9 887 r7 1k c9 0.018uf r5 2.49k l2 1.0uh c11 0.012uf r6 3.32k c7 0.1uf r3 30.9k c10 100pf r1 100k r2 100k 0.8v vout1 1.5v cin 22uf pgnd vin 12v r10 2.15k r8 1k cout2 470uf vout2 2.5v x6 x2 x2 roc1 51.1k roc2 51.1k &+ # "" # " ? > # @ .**; .**; ,!- # . # " ' a 01 % )! " " " www.irf.com 15 ip1202 ip1202 single output simplified schematic 3 * 4 $ 1 3 3 3 vin ss1 vp-ref pgnd fb1s fb1 vsw1 hiccup cc1 pgood vref rt sync vsw2 fb2 fb2s cc2 enable oc2 oc1 ss2 ip1202 vin ss1 vp-ref pgnd fb1s fb1 vsw1 hiccup cc1 pgood vref rt sync vsw2 fb2 fb2s cc2 enable oc2 oc1 ss2 c8 0.1uf l1 1.0uh cout 470u f r9 887 r7 1k c9 0.018uf r5 2.49k l2 1.0uh c11 0.012uf r6 3.32k r3 30.9k c10 100pf r1 100k r2 100k 0.8v vout 1.5v cin 22uf pgnd vin 12v rshunt1 5mohm rshunt2 5mohm x6 x4 roc1 51.1k roc2 51.1k vin ss1 vp-ref pgnd fb1s fb1 vsw1 hiccup cc1 pgood vref rt sync vsw2 fb2 fb2s cc2 enable oc2 oc1 ss2 ip1202 vin ss1 vp-ref pgnd fb1s fb1 vsw1 hiccup cc1 pgood vref rt sync vsw2 fb2 fb2s cc2 enable oc2 oc1 ss2 c8 0.1uf l1 1.0uh cout 470u r9 887 r7 1k c9 0.018uf r5 2.49k l2 1.0uh c11 0.012uf r6 3.32k r3 30.9k c10 100pf r1 100k r2 100k 0.8v vout 1.5v cin 22uf pgnd vin 5.5v x6 x4 cl1 1.0uf rl1 1.0k cl2 1.0uf rl2 1.0k rdc2 rdc1 (inductor dc resistance) (inductor dc resistance) www.irf.com 16 ip1202 * ") ' " " " ' ) "- ( /(!( / (!$ / !( / (!$ / ! / @!( /( / ( # ?( ( ) # # # ( 56- ( /( )5<+ =+ 65 8 f6 56 3 + e!( ( ( ?(!" + / ?f 5 ??f 6 8 # $ ?( # ( !(' ( " !# # ' ( )' (' $ !' ' ! " (' $!$ ,! : " " ) # > ( ## 8: 8: #' # ! + + 58 f6! 56 3 ## 8: 8: #" 5 ! 6 8 51d6 $ $$' !8: 8: 8: 8: # $ !8: 8: / !0% ! 1 56- /a )1 56 "! # ! 1 8 8 "# # ' a 10% ! % " +&3 ' ) 5 6 " ' - 5 6 "! ; ) - ;/( =( 8 #) ;/ ! $ / )3g+5 5' 66/ 8 #) ;/ ! $ / )3g+5 5' 66/a ) 1 ( d d i i load rms ? = r9 r7 r13 r1 4 ip1202 c26 (optio nal) vout1 fb1 fb1s www.irf.com 17 ip1202 8 " ! " 93+ ' $ #) ! d) 8! " 5 6 ? 0 ' # # ' # ' ' 5 6' # " ' 0% !0 % 3 " - 4" # 93+ " # ? ( ! 5a6- + ? (=$ !"#"$ 5a6 %! $ !"#"$ ) $ # # !) 5 6 + ( =$ %& 5 6 %! ( # $ %& ' $ $ %& > $ ' ( # ' " ' ? " )af 8 *31 53 ' 6 ' 1 #' " ' # % ! # " $ ! ! " ! # ! ' ! )## " # " ( ## 1d " 8 f $ ! ? ! # " ! " ' ! "' 3 # h ) 5d6 /=5 )+ )1 6 5d6 ; " " ' 1#% !2 % $ ' " 4" # ! " 4" # ' 4 ! 5f6- 4 /( !() )5';6=5 )$ %& 6 5f6 8 # ) ! $ %& > $ !4 @ ) ' # www.irf.com 18 ip1202 0 ! 2 0 - # $ ! # ' $ ' ! " ' # 5 6 # ' " 41 " ' " ia = ? * ? 41 41 ) 5?6- 5?6 %& ! # ) " ' $$ 5 ' d6 " $$$ ' # " ,311 $$ 88 ? @5 6 #526- 526 $$ ) 5 6 56- 5 9 7 7 ) ( r r r r g s h m + = 5 6 "! # ' 56 8" " # - 3 # * > > " + 1 + , 56- 56 %! ( /& ) $ # * /9 # /* 1 ! /* # /9 c 3 # ( /* ( c ( ( 9 5 2 1 c r f z = 5 9 9 5 9 7 7 1 ) ( r sc c sr r r r g s h m + + = ) (2 / 1 0 0 c l f lc = magnitude(db) frequency f z h(s) db c10 r9 r7 e/a1 vout1 fb1 vref cc1 ip1202 c9 r5 (optional) m lc esr in g r r r f f f v r 1 1 25 . 1 7 9 7 2 0 5 + = ( www.irf.com 19 ip1202 f > 41 o o z c l f = 2 1 75 . 0 5 6 a 1 1 56 5 6 1 ' ! ) # - / @ - / ?@ * / @ /a@! 5d6 + / ? + , / a2e 1 /?8 # ' 3 ! " " 1 !) 8 ? 511 6 # 5a6- 5a6 1 !) 5 6 5a6 / =- 5 6 ,3111 $$$ " " # 8 2 $$$ " $$$ # 5d6 5d6 $$$ " $$$ " - / 5f6 5?6 19 24 2 2 1 c r f p = magnitude(db) frequency f z1 h(s) db f z2 f p2 f p3 c10 r9 r7 e/a1 vout1 fb1 vref cc1 ip1202 r23 c9 c18 r24 c19 opt p c r f 5 2 2 1 ) 1 ( ) 1 ( ) 1 ( ) 1 ( 1 ) ( 21 25 22 26 21 9 9 26 9 9 c sr c sr c sr c sr c sr s h + + + + 5 6 526 56 18 23 3 2 1 c r f p ? 9 23 1 2 1 c r f z = 19 9 2 2 1 c r f z = 5 2 2 1 r f c p opt = www.irf.com 20 ip1202 2 2 lc z f f = # * $$$ 56- 56 8" " # - 3 # * > > " + 3+ j ? - f > ' ;1 5 6 a " 31? 1 . kk 1 1 56 d > 1 + 56 f 1 ! # + 5?6 & + k ? c 5 6 + + /+ ) 5 6 & # ' # 5 " 6 ' a 0 # + ,' a $ ' ! # ! !" ! 4 * ' " + + / " ' 5a6 "! * # - " ) 5 6 11 6 2 1 c r f z = 5 6 ' + # 1 5a6! 5 6 5d6 $$$ # $ ! ! $$ $ # > # # 5d6 r e/a2 r ip1202 c11 r6 l1 l2 sh1 r sh2 vsw1 vsw2 vp-ref cc 2 load fb2 vout $ )1 0 0 19 23 0 2 1 8 . 0 c l c r v f in = ) 6 10 9 c 5a6 out in sh m v v l f r g r ? = 2 02 1 6 2 1 25 . 1 6 $8 !4 4 # + + 6 6 ?6 www.irf.com 21 ip1202 .)b* ) 118 .b* 118 . b 7118 ( * ? @ .)b* ) )6: .b* )6: .,b* ) )1+: . b* )1+: 5* # !" * 6 .)b* )116: .,b= !+: .)b* )116: .,b= !+: . . .) ., www.irf.com 22 ip1202 .)b* ) )6: .b* )6: .,b* ) )1+: . b* )1+: # 5 " # ! " 6 .)b* ) )6: .b* )6: ## 5*## "6 65,,6 .)b* ) )16: .b* )16: .,b* ) )1+: . b* )1+: 65)6 .)b* ) )16: .b* )16: .,b* !16: * # . . .) ., www.irf.com 23 ip1202 .)b* )1!6: .b* 1!6: " ' .)b* )1!6: .b* 1!6: 4 " ' ' www.irf.com 24 ip1202 8 " " ! ' " - 8" 8 & 4 4 # "' " " ( "! ' # # ' "' # .,; # " ! ! " " # a ( ' !) # ' 8 ( ( 8: 8: #! " ' d ( ' ' f 8 ! ? + $+ ,' 2 ' " # " ' " 1: 2 # + + layout guidelines ip1202 suggested layout www.irf.com 25 ip1202 fig. 32: reference design schematic vin ss1 vp - re f pgnd cc1 fb1 vs w1 hiccup fb1s vs w2 fb2 cc2 enable pgood ss2 rt sync vre f fb2s oc1 oc2 ip1202 vin ss1 vp - re f pgnd cc1 fb1 vs w1 hiccup fb1s vs w2 fb2 cc2 enable pgood ss2 rt sync vre f fb2s oc1 oc2 c4 22uf c3 22uf c2 22uf c1 22uf 16v 16v 16v 16v tp1 vin tp2 pgnd c8 0.1uf ss1 l1 1uh tp8 vsw1 c12 470uf c13 470uf c14 0.1uf tp14 pgn d 6.3v 6.3v r9 887 1% r7 1k 1% fb1 c9 0.018uf r5 2.49k cc1 r15 5mohm r16 0 c15 470uf c17 0.1uf l2 1uh r10 2.15k 1% r8 1k 1% tp10 vsw2 c16 470uf c11 0.012uf tp 1 pg r6 3.32k 6.3v 6.3v vsw2 fb2 cc2 r19 5mohm r17 0 enable pgood tp6 sync vsw1 vin vp-ref c7 0.1uf ss2 r3 30.9k c10 100pf hiccup r1 100k r2 100k r13 887 1% r14 1k 1% r11 2.15k 1% r12 1k 1% 0.8v tp11 vou t tp 1 vo fb1s vref fb2s rt sync designator independ ent mo d e(du al ou tp ut) 2 ph as e mo de(s ingle o ut pu t) r16 r17 r8 r10 removed removed installed installed installed installed removed removed output configuration r4 installed removed r15, r19 short 5mohm ? **for independent mode, output voltages are set by using the following equations: for vout1: set r7 (or r8) to 1k, vref to 0.8v, and vout to desired output, then solve for r9 (or r10 respectively). r9 = r7[(vout1/vref) - 1]. for vout2: r10 = r8[(vout2/vref) - 1]. for parallel (single output) mode, check table on the left. ? ? ? ? ? ? ** ** r4 0 ? 2 1 jp1 hiccup 2 1 jp3 enable vin vin roc1 51.1k 1% roc2 51.1k 1% oc1 oc2 tp28 vin tp29 pgnd tp15 vout1 tp16 pgnd tp17 vout2 tp18 pgnd (1. 5v) (2. 5v) vo ut 1 vo ut 2 vs w1 s vs w2 s tp20 vou t tp2 2 pg n tp3 vin tp4 pgnd r22 0 fb1s r11 r12 installed removed r22 removed installed c18 ni c19 ni c20 ni c21 ni r23 ni r24 ni r25 ni r26 ni c23 22uf c22 22uf 16v 16v c24 ni c25 ni c26 100pf c27 100pf type iii compensation *** *** *** *** *** *** *** *** *** ni: not installed r27 1 3 5 7 9 11 13 15 2 4 6 8 10 12 14 16 con4 input/output enable vins pgnds vs w1 s vs w2 s vout 1 vout 2 jp1-1 shunt jp3-1 shunt (short for independent output configuration) (short for independent output configuration) r27 0 ? ?? designator type ii configuration type iii configuration c18, c19 c20, c21 c9, c11 r5, r6 removed removed installed installed installed installed installed removed compensation configuration installed r23, r24, r25, r26 removed ?? vin=5.5v-13.2v www.irf.com 26 ip1202 irdcip1202-a (single, paralleled output configuration(for 1.5v output) table 2. reference design bill of materials irdcip1202-a (dual, independent output configurations(channel1 1.5v output, channel2 2.5v output) qty ref designator description size mfr part number 6 c1, c2, c3, c4, c22, c23 capacitor, ceramic, 22f, 25v, x5r, 20% 1812 tdk c4532x5r1e226m 4 c7, c8, c14, c17 capacitor, ceramic, 0.1f, 50v, x7r, 10% 0603 tdk c1608x7r1h104k 1 c11ca p acitor, ceramic, 0.012uf, 25v, x7r, 10% 0603 ph y com p 06032r123k8b20 4 c12, c13, c15, c16 capacitor, poscap, 470f, 6.3v, electrolytic 20% 7343 sanyo 6tpb470m 3 c10, c26, c27 capacitor, ceramic, 100pf, 50v, npo, 5% 0603 phycomp 0603cg101j9b20 1 c9 capacitor, ceramic, 0.018uf, 25v, x7r, 10% 0603 phycomp 06032r183k8b20 2 l1, l2 inductor, 1h, 19a, 20% 13.0mm x 12.9mm panasonic etqp1h1r0bfa 2 r13, r9 resistor, thick film, 887 ? , 1/10w, 1% 0603 koa rk73h1j8870f 2 r7, r14 resistor, thick film, 1.0k ? , 1/10w, 1% 0603 koa rk73h1j1001f 2 roc1,roc2 resistor, thick film, 51.1k ? , 1/10w, 1% 0603 koa rk73h1j5112f 2 r15, r19 resistor, allo y metal, 5m ? , 1w, 1% 2512 panasonic erjm1wsf5m0u 1 r27 resistor, man g anin-foil, 0 ? , 2w 2716 isotek cor p smt-r000 3 r16, r17, r22 resistor, thick film, 0 ? , 1/16w 0603 rohm mcr03ezhj000 15 c18, c19, c20, c21, c24, c25, r10, r11, r12, r4, r8, r23, r24, r25, r26 not installed - - - 2 r1, r2 resistor, thick film, 100k ? , 1/10w, 1% 0603 koa rk73h1j1003f 1 r5 resistor, thick film, 2.49k ? , 1/10w, 1% 0603 koa rk73h1j2491f 1 r6 resistor, thick film, 3.32k ? , 1/10w, 1% 0603 koa rk73h1jltd3321f 1 r3 resistor, thick film, 30.9k ? , 1/10w, 1% 0603 koa rk73h1j3092f 1 u1 bga power block 9.25mm x 15.5mm ir ip1202 qty ref designator description size mfr part number 6 c1, c2, c3, c4, c22, c23 capacitor, ceramic, 22f, 25v, x5r, 20% 1812 tdk c4532x5r1e226m 4 c7, c8, c14, c17 ca p acitor, ceramic, 0.1 f, 50v, x7r, 10% 0603 tdk c1608x7r1h104k 1 c11 capacitor, ceramic, 0.012uf, 25v, x7r, 10% 0603 phycomp 06032r123k8b20 4 c12, c13, c15, c16 capacitor, poscap, 470f, 6.3v, electrolytic 20% 7343 sanyo 6tpb470m 3 c10, c26, c27 ca p acitor, ceramic, 100 p f, 50v, npo, 5% 0603 ph y com p 0603cg101j9b20 1 c9 capacitor, ceramic, 0.018uf, 25v, x7r, 10% 0603 phycomp 06032r183k8b20 2 l1, l2 inductor, 1h, 19a, 20% 13.0mm x 12.9mm panasonic etqp1h1r0bfa 2 r13, r9 resistor, thick film, 887 ? , 1/10w, 1% 0603 koa rk73h1j8870f 2 r10, r11 resistor, thick film, 2.15k ? , 1/10w, 1% 0603 koa rk73h1j2151f 4 r7, r8, r12, r14 resistor, thick film, 1.0k ? , 1/10w, 1% 0603 koa rk73h1j1001f 2 roc1,roc2 resistor, thick film, 51.1k ? , 1/10w, 1% 0603 koa rk73h1j5112f 2 r15, r19 resistor, manganin-foil, 0 ? , 2w 2716 isotek corp smt-r000 1 r4 resistor, thick film, 0 ? , 1/10w, 5% 0603 rohm mcr03ezhj000 14 c18, c19, c20, c21, c24, c25, r16, r17, r22, r23, r24, r25, r26, r27 not installed - - - 2 r1, r2 resistor, thick film, 100k ? , 1/10w, 1% 0603 koa rk73h1j1003f 1 r5 resistor, thick film, 2.49k ? , 1/10w, 1% 0603 koa rk73h1j2491f 1 r6 resistor, thick film, 3.32k ? , 1/10w, 1% 0603 koa rk73h1jltd3321f 1 r3 resistor, thick film, 30.9k ? , 1/10w, 1% 0603 koa rk73h1j3092f 1 u1 bga power block 9.25mm x 15.5mm ir ip1202 www.irf.com 27 ip1202 mechanical drawing + " " *%$+ - (5/46% --## 71! #6. !8+# !1! 6% !9 &:16 ,% 3;+( &%8 " *%$+:. l ! ! "! ! " (5/4-<&0;23 !&:16,% 3 " 1: ! ! # (5/4 4(3&:16&! #% = !,!-$! - ) " "4 3* # # # "3 * *%$+ ,' a -3 : 1#" (5/4 +!% . !% 8 !(! ,' ) " "4 3* # # # "3 * ' *%$+ ,' - " 3 0.12 [.005] c 2. dime ns ions are s hown in mill ime t e rs [inche s ]. 3. cont roll ing dime ns ion: mil l ime t e r 1. dimens ioning & t olerancing per as me y14.5m-1994. not e s : (2x 0.625 [.025]) top view bottom view side view c 0.45 [.0177] 0.35 [.0138] package body. ball diameter, in a plane parallel to datum c. s pherical crowns of t he s older balls . 4. s older ball pos it ion des ignat ion per jes d 95-1, s pp-010. 7 solder ball diameter is measured at the maximum solder 5 pr imar y dat u m c (s e at ing p l ane ) is de f ine d b y t he 6 b ilat eral t ole rance zone is applied t o each s ide of t he 5 0.15 [.006] c cor ne r i d ball a1 2x 6 15.50 [.610] b 9.25 [.364] a 0.15 [.006] c 2x 6 0.15 [.006] c a b 0.08 [.003] c 154x ? 0.45 [.0178] 0.55 [.0216] 7 0.80 [.032] 27x 0.40 [.016] 2x 8. not t o s cale. 2.33 [.0917] 2.11 [.0831] 2.78 [.1094] 2.46 [.0968] www.irf.com 28 ip1202 data and specifications subject to change without notice. this product has been designed and qualified for the industrial market. qualification standards can be found on ir?s web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 03/02 part marking tape & reel information 1. out line conf orms t o eia-481 & eia-541. ip1202, bga not es : feed direction 20.00 (.787) ip1202 xxxx 0325 24.00 (.945) ip1202 xxxx 0325 ip1202 xxxx 0305 ball a1 identifier inte rnat onal rectif ier logo assembly code date code ww= week part number factory code ball a1 identifier inte rnat onal rectif ier logo assembly code (yyww) yy=year ww= week factory code ip1202 xxxx 0305 ball a1 identifier inte rnat onal rectif ier logo assembly code date code ww= week part number factory code ball a1 identifier inte rnat onal rectif ier logo assembly code (yyww) yy=year ww= week factory code |
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